AMD is preparing a significant redesign of its CPU architecture with the upcoming Zen 6 generation, signaling a clear break from the incremental approach taken in recent years. Rather than treating Zen 6 as an extension of Zen 5, the company appears to be reworking key low-level mechanisms of the x86 platform.
One of the most notable changes is AMD’s decision to adopt Intel’s Flexible Return and Event Delivery (FRED) instruction set, along with new matrix-multiplication and bit-reversal instructions.
The development was first identified by InstLatX64 on X, revealing that AMD is aligning its future silicon with a long-anticipated modernisation of how x86 processors handle system events.
Replacing a 40-Year-Old Mechanism
FRED is designed as a complete replacement for the Interrupt Descriptor Table (IDT), a mechanism dating back to the Intel 80286 era more than four decades ago. The IDT is still responsible for handling interrupts today, including routine events such as network packets arriving, storage operations completing, or user input from a keyboard or mouse. While functional, the system has long been criticised for its complexity and reliance on legacy behaviour.
Under the IDT model, transitions between user applications and kernel code are cumbersome. Developers must manually manage multiple steps, account for multiple privilege levels, and carefully avoid race conditions when interrupts overlap. This complexity increases the risk of subtle bugs in operating systems, drivers, and virtualisation software.
FRED replaces this with a cleaner, more modern approach. It introduces atomic, one-shot instructions that handle transitions between kernel and user space in a consistent and predictable way. Instead of juggling multiple ring levels, the system is simplified to just two: ring 0 for the kernel and ring 3 for user applications.
Industry Coordination Through the x86 Advisory Group
AMD’s adoption of FRED is the result of closer coordination between the two major x86 vendors. Both AMD and Intel are members of the x86 Ecosystem Advisory Group, formed to modernise the instruction set while maintaining compatibility across vendors.
Intel proposed FRED as a clean replacement for IDT, while AMD initially explored an alternative called Supervisor Entry Extensions (SEE). SEE aimed to minimise disruption by working around legacy behaviour rather than removing it entirely. This difference raised concerns about fragmentation and interoperability.
Those concerns were echoed publicly by Linus Torvalds, who argued that a unified approach would benefit the ecosystem. While he acknowledged AMD’s SEE as practical, he praised Intel’s FRED as a more comprehensive solution that eliminates outdated design decisions altogether. AMD’s decision to implement FRED suggests that alignment has now been achieved.
Software Support Already Underway
Although no production CPUs currently support FRED, the software ecosystem has already begun preparing for it. The Linux kernel introduced provisional support in version 6.9, ensuring that operating systems will be ready once compatible hardware ships. It is widely expected that future versions of Windows, both desktop and server, will also enable FRED when Zen 6 and Intel’s upcoming Nova and Panther Lake processors arrive.
Importantly, FRED is a low-level feature. It will not affect applications directly, but instead improves the foundation upon which operating systems, drivers, hypervisors, and bootloaders are built.
Performance and Stability Gains Expected
By reducing the number of CPU cycles required to handle interrupts and system events, FRED has the potential to improve overall system responsiveness. Lower event latency can benefit workloads that generate large volumes of interrupts, such as high-speed networking, storage I/O, virtualization, and even latency-sensitive tasks like audio processing or high-refresh-rate gaming.
Virtualized environments stand to gain the most, as interrupt handling in those scenarios often passes through multiple abstraction layers. Simplifying and accelerating these transitions could yield measurable performance improvements under heavy load.
A Long-Awaited Cleanup for x86
The x86 architecture has often been criticized for carrying decades of legacy baggage. AMD’s decision to fully embrace FRED with Zen 6 represents a rare and meaningful cleanup at the architectural level. While real-world performance gains will vary by workload, the move promises simpler, safer, and more efficient low-level software development.
If expectations hold, Zen 6 will not just be another generational update, but a foundational shift in how modern x86 systems operate.
